Updated: 11/24/2005; 11:31:57 PM.

General networking
Data network connectivity developments, networking business news, and related computing items.

daily link  Monday, April 26, 2004

Compiling hardware from C++ code: Maxeler is a New York city company that supplies a product called ASC: A Stream Compiler for Computing with FPGAs.  "ASC is fully embedded in standard C++, and as such, ASC programs are compiled by a conventional C++ compiler. The concepts of timing and architecture of the circuit are expressed by ASC hardware types and operators. The ASC system facilitates design space exploration by providing three levels of abstraction: architecture level, arithmetic level and gate level. Since each intermediate representation is human readable C++, it is easy to optimize implementations at each of these levels and explore such optimizations within the ASC framework.  Conceptually, ASC follows the philosophy of the C programming language. The objective is to offer the capability to optimize the program for maximal performance, and at the same time provide a language interface that increases productivity. "

They claim typical 30x improvements in performance. Key factor is optimizing the data types to the bit representations to the data, rather than using standard int and float.  Varying the mantissa and exponent to fit the problem saves a lot.

"ASC provides a software-like interface to programming FPGAs and enables rapid exploration of the design space for FPGA implementations. This increase in productivity of up to 10x can result, for example, in 20-30 implementations of an algorithm in the same time it otherwise takes to develop 2-3 implementations. The advantages of ASC for an architecture that supports reconfiguration, or customizable architectures with a large number of (FPGA) nodes, have the potential to change the way we think about computing."

IP also developed: "Maxeler Technologies utilizes it's programming technology to develop state-of-the-art, flexible, parametrizable arithmetic modules and IP blocks implementing entire algorithms. Examples for our IP blocks are FFT (fixed point and floating point), Reed Solomon Code, IDEA encryption, and IDCT for video coding. "  Makes me think about linking this to genetic programming for IP generation.

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Copyright 2005 © Ken Novak.
Last update: 11/24/2005; 11:31:57 PM.